Bin da liu

A Two-Stage Rate Control Mechanism for RDO-Based H.264/AVC Encoders

This paper jointly considers the mechanisms of rate control and the rate-distortion optimization (RDO) for the H.264/AVC hardware encoder. The proposed architecture performs intra …

Li chuan chang
•

Dual-core virtual platform with QEMU and SystemC

Dual-core platforms are growing as a new industry trend as platforms with only one core cannot easily perform the diverse functions in current embedded system applications, such as …

Cheng shiuan peng
•

Low complexity MAD prediction algorithms for rate controllable H.264/AVC hardware encoders

This paper presents two low complexity macroblock-level MAD (Mean Absolute Difference) prediction algorithms for H.264/AVC rate control. Both of the algorithms consider the …

Li chuan chang
•

Hardware/Software Codesign of a Low-Cost Rate Control Scheme for H.264/AVC

This paper presents a low-complexity rate control (RC) framework for H.264/advanced video coding (AVC) encoders on embedded systems. We consider not only the rate-distortion …

Chih hung kuo
•

A Real Time and Low Cost Hardware Architecture for Video Abstraction System

In this paper, we propose a real time hardware architecture with low cost for histogram difference calculator to process and low-level extraction in our video abstraction system. …

Li chuan chang
•